71 posts found

Integrating Wireshark with UVM: A High-Level Overview One of the key challenges...
SystemVerilog
July 1, 2026

In previous blogs, we have explained the fundamentals of DPI and how...
SystemVerilog
July 1, 2026

The UVM Factory is a software design pattern employed in UVM. It...
RTL Verification
July 1, 2026

The `UVM_config_db` is a global database that stores key-value pairs, similar to...
RTL Verification
July 1, 2026

UVM phases are virtual methods defined within the `uvm_component` class. This class...
RTL Verification
July 1, 2026

From gigabytes of bird songs to a 60 kB model that runs...
Embedded Software
July 1, 2026

In verification, when testing a device with random inputs, it is important...
RTL Verification
July 1, 2026

What does it involve? In electronics, hardware-in-the-loop (HIL) is a technique used...
Embedded Software
July 1, 2026

When it comes to embedded systems, especially in fields like industrial control...
Embedded Software
July 1, 2026